Cis 371 upenn

Cis 371 upenn. The Any two of the following project oriented classes: (Nets 212, CIS 341, CIS/ESE 350, CIS 371, CIS 380, CIS 550, CIS 555, CIS 460, CIS 505, CIS 553) The application must include a plan for completing all requirements for their current undergraduate and CIS/MSE program. Based on this yield equation, what is this facility's yield for chips of 100 mm 2, 200 mm 2, 400 mm 2?. For this assignment, you may assume S, B, and A are all powers of 2. Key Links. CIS 371/501: Computer Organization and Design. The ISA will will implement in CSE 371/372 is called P37X. 8, 1. To make a prediction, the predictor selects a counter from the table using using the lower-order n bits of the instruction's Where A is the area of the chip in mm 2, D is the defects per mm 2, and yield is a number between 0 and 1. Milo Martin | Data-Level Parallelism 11 GPUs and SIMD/Vector Data Parallelism • How do GPUs have such high peak FLOPS & FLOPS/Joule? A Verilog-HDL OnLine training course. 5 1 1. Amir Roth & Milo Martin & C. Due Dates. Milo Martin: Lecture: Monday/Wednesday/Friday 3:00-4:30 in Towne 311: E-mail: cis371@seas: TA: Arun Raghavan: Graders: Arun Raghavan, Neeraj Eswaran, Vipan Kumar: Admin: Cheryl Hickey (cheryl@central. ml and dnaTest. 5MB L2 L3 tags 64KB D$ 64KB I$ IBM Power5 (dual core) •! Chips today are 30–70% cache by area CIS 371 (Roth/Martin): Caches 19 This Unit: Caches •! “Cache”: hardware managed •! Hardware automatically retrieves CIS 371 (Spring 2011): Computer Organization and Design. | Prof. Using code from outside sources is not allowed, except where the assignment specifically PC Memory 216 by 16 bit 16 16 16 16 3’b111 insn[11:9] 3 Branch Unit 16 wdata16 LC4 Non-Pipelined Datapath - Spring 2011 Reg. Workload: The course will involve three substantial programming assignments, a group project, and two midterms. Lab 5 3 Senior Fall Tech. To make a prediction, the predictor selects a counter from the table using using the lower-order n bits of the instruction's CIS 371 Computer Organization and Design Unit 4: Integer Arithmetic CIS371 (Roth/Martin): Integer Arithmetic 2 This Unit: Integer Arithmetic •A little review •Binary + 2s complement •Ripple-carry addition (RCA) •Fast integer addition •Carry-select (CSeA) •Mention of Carry-lookahead (CLA) •Shifters •Integer multiplication Logistics: Turn in your div. Milo Martin | Virtual Memory 1 CIS 371 Computer Organization and Design Unit 8: Virtual Memory Slides developed by Milo Martin & Amir Roth at the University of Pennsylvania with sources that included University of Wisconsin slides by Mark Hill, Guri Sohi, Jim Smith, and David Wood CIS 371 (Martin): Performance 1 CIS 371 Computer Organization and Design Unit 6: Performance Metrics CIS 371 (Martin): Performance 2 This Unit • CPU performance equation • Clock vs CPI • Performance metrics • Benchmarking Mem CPU I/O System software App App App CIS 371 (Martin): Performance 3 Readings • P&H CIS 371 (Martin): Superscalar 1 CIS 371 Computer Organization and Design Unit 9: Superscalar Pipelines CIS 371 (Martin): Superscalar 2 A Key Theme of CIS 371: Parallelism • Previously: pipeline-level parallelism • Work on execute of one instruction in parallel with decode of next • Next: instruction-level parallelism (ILP) Course Description. Any rights not expressly granted herein are reserved. Michael Kearns mkearns@cis. Instructor: Prof. Milo Martin CIS 371 (Martin): Virtual Memory 2 This Unit: Virtualization • The operating system (OS) • A super-application • Hardware support for an OS • Virtual memory CIS 5190 is NOT a prerequisite for CIS 5200. Date Rating. This is a second computer organization course and focuses on computer hardware design. Martin, A. CIS 371 (Martin): Superscalar 1 CIS 371 Computer Organization and Design Unit 10: Superscalar Pipelines CIS 371 (Martin): Superscalar 2 A Key Theme of CIS 371: Parallelism • Previously: pipeline-level parallelism • Work on execute of one instruction in parallel with decode of CIS 371 (Martin): Single-Cycle Datapath 1 CIS 371 Computer Organization and Design Unit 4: Single-Cycle Datapath Based on slides by Prof. P37X shares the following features with LC3 (and differences with MIPS): CIS 371 (Martin): Virtual Memory 1 CIS 371 Computer Organization and Design Unit 9: Virtual Memory Slides developed by Milo Martin & Amir Roth at the University of Pennsylvania with sources that included University of Wisconsin slides by Question 3 - Generalizing the Calculations. Roth, C. CIS 371 (Spring 2011): Computer Organization and Design. Milo Martin | Virtual Memory 1 CIS 371 Computer Organization and Design Unit 8: Virtual Memory Slides developed by Milo Martin & Amir Roth at the University of Pennsylvania with sources that included University of Wisconsin slides by Mark Hill, Guri Sohi, Jim Smith, and David Wood CIS 371: Comp. Learn how to design and implement a pipelined processor for the RISC-V ISA using SystemVerilog. CIS 380: Operating Systems. Britton Carnevali Doctoral Program Manager CIS 371 (Martin/Roth): Power 1 CIS 371 Computer Organization and Design Unit 13: (Low) Power and Energy CIS 371 (Martin/Roth): Power 2 Power/Energy Are Increasingly Important •!Battery life for mobile devices •!Laptops, phones, cameras •!Tolerable temperature for 1 Mnemonic Semantics Encoding Instructions NOP -- 0000000-----BRn IMM9 <LABEL> N ? PC = PC+1+SEXT(IMM9) 0000100IIIIIIIII BRnz IMM9 <LABEL> N|Z ? Xilinx ModelSim Simulation Tutorial CSE 372 (Spring 2007): Digital Systems Organization and Design Lab. Louis Petro, BAS in Computer and Cognitive CIS 371 (Spring 2012): Digital Systems Organization and Design Lab . Grading. Functional simulation is used to make sure that the logic of a design is CIS 371 (Spring 2011): Computer Organization and Design. Both the programming assignments and the 3440 Market Street, Suite 100 Philadelphia, PA 19104-3335 (215) 898-7326 summer@sas. + I'm an undergraduate (in CSCI or CMPE) who needs CIS 371 CIS 371 (Spring 2012): Digital Systems Organization and Design. This is the second computer organization course and focuses on computer hardware design. , CIS 121, CIT 594, or equivalent. Louis Petro, BAS in Computer and Cognitive Science, BA Cognitive Science, Minors in Nutrition and Mathematics Semesters as a TA: Fall 2013 – Spring 2015: CIS 110 Lpetro712@gmail. About the course. This page contains instructions for using the programmable PROM on the Xilinx Virtex-II FPGA boards. CIS 371 (Martin/Roth): Recap 5 Microsoft XBox Game Console History •! XBox •! First game console by Microsoft, released in 2001, $299 •! Glorified PC •!733 Mhz x86 Intel CPU, 64MB DRAM, NVIDIA GPU (graphics) •!Ran modified version of Windows OS •! CIS 371 (Martin/Roth): Recap 14 Xenon Multicore Interconnect [Brown, IBM, Dec 2005] CIS 371 (Martin/Roth): Recap 15 XBox 360 System [Andrews & Baker, IEEE Micro, Mar/Apr 2006] CIS 371 (Martin/Roth): Recap 16 XBox Graphics Subsystem [Andrews & Baker, IEEE Micro, Mar/Apr 2006] 28. 5 MB L2, L3 tags • AMD Quad Phenom • Four 2+ GHz cores • Per-core 512KB L2 CIS 371: Comp. Org & Design | Dr. Milo Martin: Due: Tuesday, February 28th at noon (turn in paper copy in class) Alternative: Use one "grace period" to turn it in on Tuesday, March 13th at noon. ESE 532: System-on-Chip Design CIS 371 (Spring 2008): Digital Systems Organization and Design Course Schedule 3440 Market Street, Suite 100 Philadelphia, PA 19104-3335 (215) 898-7326 summer@sas. • Course overview and administrivia. g. ### Frequently Asked 1. Milo Martin: Demo Due: Thursday, February 24 (you must demo it in the KLab by 7pm) Writeup Due: Friday, February 25 (turn in PDF via Blackboard) Instructions: Bimodal Predictor. CIS 371 Computer Organization and Design Unit 3: Arithmetic CIS371 (Roth/Martin): Arithmetic 2 This Unit: Arithmetic •! A little review •! Binary + 2s complement •! Ripple-carry addition (RCA) •! Fast integer addition •! Carry-select (CSeA) •! Shifters •! Integer Multiplication and division •! Floating point arithmetic Mem CPU I Logic Equations Show the logic equations for the logic functions, D, E, and F, described in the previous example. Junior Spring M/NS elec. Milo Martin: Lecture: Monday/Wednesday/Friday 3:00-4:30 in Towne 321: E-mail: cis371@cis: TA: Santosh Nagarakatte: Grader: Saumya Jain: This course is the lecture component of CIS 371 (Martin): Arithmetic 1 CIS 371 Computer Organization and Design Unit 3: Arithmetic Based on slides by Prof. Design Document (Part A) Due: Thursday, April 4th (turn in PDF via Canvas by 6pm) Preliminary Demo CIS 371 (Martin/Roth): Recap 1 Unit 14: Putting It All Together: Anatomy of the XBox 360 Game Console CIS 371 Computer Organization and Design CIS 371 (Martin/Roth): Recap 2 This Unit: Putting It All Together •! Anatomy of a game console •! Microsoft XBox 360 •! Focus mostly on CPU chip •! Briefly talk about system •! Graphics Question 3 - Generalizing the Calculations. Write the formulas for: XUP Virtex-II Pro Development System www. The programmer specifies the "optimization" level the compiler performs. Term CUs CUs Frosh Fall Math 104 CIS 110 Phys 150 SSH 4. cis 140, cis 120, cis 110, cis 350, cis 450, cis 262, cis 320, cis 240, cis 121 I never took that class but I've heard good things. Date: CIS 371 (Spring 2008): Digital Systems Organization and Design. Unit 10: Superscalar Pipelines. cis) - 502 Levine Hall: Board: PHPbb discussion board CIS 371 (Roth/Martin): Superscalar Pipelines 1 CIS 371 Computer Organization and Design Unit 6: Superscalar Pipelines CIS 371 (Roth/Martin): Superscalar Pipelines 2 A Key Theme of CIS 371: Parallelism •! Last unit: pipeline-level parallelism •! Work on execute of one instruction in parallel with decode of next CIS 371: Comp. edu. 8 GB/s link bandwidth 10. You should be comfortable with programming (in Java) and data structures - i. Wait for branch outcome (two-cycle penalty) Fetch past branch . The programmable logic boards used for CIS 371 are Xilinx Virtex-II Pro development systems. Milo Martin | XBox 360 10 XBox 360 “Xenon” Processor • ISA: 64-bit PowerPC chip • RISC ISA • Like MIPS, but with condition codes • Fixed-length 32-bit instructions • 32 64-bit general purpose registers (GPRs) • ISA Extended with VMX-128 operations A Verilog-HDL OnLine training course. repo for CIS 371 Spring 2018. | Dr. Milo Martin: Demo Due: Although we encourage you to demo early, your demo must be completed by Thursday, February 21st (you must demo it in the KLab by 6pm) Writeup Due: Friday, February 22nd (turn in Studying CIS 371 Computer Organization and Design at University of Pennsylvania? On Studocu you will find summaries, tutorial work and much more for CIS 371 UPENN. It has been renumbered to fit the standard university numbering scheme for cross-listed undergrad/grad courses. ISE Simulator is an application that integrates with Xilinx ISE to provide simulation and testing tools. This is the second computer organization course and focuses on CIS 371 (Spring 2011): Computer Organization and Design. Teaching. Lecture Notes. Write the formulas for: CIS 371: Comp. , bread) CIS 371 (Martin): Arithmetic 1 CIS 371 Computer Organization and Design Unit 3: Arithmetic Based on slides by Prof. CIS 371 (Martin): Xbox 360 9 XBox 360 System [Andrews & Baker, IEEE Micro, Mar/Apr 2006] CIS 371 (Martin): Xbox 360 10 XBox 360 “Xenon” Processor • ISA: 64-bit PowerPC chip • RISC ISA • Like MIPS, but with condition codes • Fixed-length 32-bit instructions • 32 64-bit general purpose registers (GPRs) CIS 371: Comp. If you forget how to set the configuration switches or program the FPGA, review section VI of the tutorial. Milo Martin: Demo Due: Although we encourage you to demo early, your demo must be completed by Thursday, February 7th (you must demo it in the KLab by 6pm) Writeup Due: Friday, February 8th (turn in PDF via Canvas) CIS 371 (Spring 2011): Computer Organization and Design. Bimodal Predictor. Pervasive Idea: CIS 371 (Martin): Scheduling 14 Static (Compiler) Instruction Scheduling • Idea: place independent insns between slow ops and uses • Otherwise, pipeline stalls while waiting for Studying CIS 371 Computer Organization and Design at University of Pennsylvania? On Studocu you will find summaries, tutorial work and much more for CIS 371 UPENN. Varun Prabakar, BS in Statistics and Finance Semesters as a TA: Fall 2013 – Spring 2015: CIS 160, Head III. CIS 5190 vs. By appointment. Your CIS Contacts: Redian Furxhiu Program Manager for on-campus Graduate MCIT, CIS/MSE and CGGT programs Office: 308 Levine Phone: 215-898-1668 Email: redian@seas. Used to assemble LC4 code into a . The goal of the course is to ensure that students are comfortable enough with the math required for the rest of the undergraduate program. Milo Martin | Arithmetic 1 CIS 371 Computer Organization and Design Unit 3: Arithmetic Based on slides by Prof. 0) March 8, 2005 "Xilinx" and the Xilinx logo shown above are registered trademar ks of Xilinx, Inc. Prediction. 5 CU Increments Total Eng. Milo Martin: Design Document Due: Wednesday, April 13th (turn in PDF via Blackboard by 7pm) Preliminary Demo Due: Thursday, April 21st (you must demo it CIS 371: Comp. e. CIS 1210 and CIS 3200 and many others heavily rely on concepts taught in this course. There is no Office Hours. jpg "Xilinx XC2064 die photo, c/o Xilinx") CIS 501: Computer Architecture Spring 2019 #### Frequently Logic Equations Show the logic equations for the logic functions, D, E, and F, described in the previous example. UPENN; Computer Organization and Design; Computer Organization and Design (CIS 371) 3 3 documents. Before you begin, you'll want to walk through the tutorial. [May 1] - The Homework 2 repo for CIS 371 Spring 2018. The centerpiece of the board is a Virtex-II Pro XC2VP30 FPGA (field-progammable gate array), which can be programmed via a USB cable or compact flash card. Milo Martin: Demo Due: Thursday, March 31st (you must demo it in the KLab by 7pm) Writeup Due: Friday, April 1st (turn in PDF via Blackboard by 7pm) Instructions: This CIS 371 (Martin): Digital Logic & Hardware Description 33 N-bit Adder/Subtracter FA +/- S B 1 A S 1 1 FA B 0 A S 0 0 FA B N-1 A N-1 S N-1 1 0 +/– +/– B A • More later when we cover arithmetic Hardware Design Methods CIS 371 (Martin): Digital Logic & Hardware Description 34 CIS 371 (Martin): Digital Logic & Hardware Description 35 CIS 371 (Martin): Multicore 10 Intel Quad-Core “Core i7” CIS 371 (Martin): Multicore 11 CIS 371 (Martin): Multicore 12 Application Domains for Multiprocessors • Scientific computing/supercomputing • Examples: weather simulation, aerodynamics, protein folding • Large grids, integrating changes over time CIS 371: Comp. 5 lectures) Unit 2 - Digital Logic & You will learn the range of architectural techniques used in modern CPU design including superscalar design, out-of-order execution, and cache hierarchies. v (memory module) • You will see this line at the top `define MEMORY_IMAGE_FILE "code/wireframe. edu . Default: assume “not-taken” (at fetch, can’t tell it’s a branch) No category Performance - CIS @ UPenn 1 Mnemonic Semantics Encoding Instructions NOP -- 0000000-----BRn IMM9 <LABEL> N ? PC = PC+1+SEXT(IMM9) 0000100IIIIIIIII BRnz IMM9 <LABEL> N|Z ? CIS 371 (Martin/Roth): Recap 14 Xenon Multicore Interconnect [Brown, IBM, Dec 2005] CIS 371 (Martin/Roth): Recap 15 XBox 360 System [Andrews & Baker, IEEE Micro, Mar/Apr 2006] CIS 371 (Martin/Roth): Recap 16 XBox Graphics Subsystem [Andrews & Baker, IEEE Micro, Mar/Apr 2006] 28. Milo Martin | Instruction Sets 10 Compatibility • In many domains, ISA must remain compatible • IBM’s 360/370 (the first “ISA family”) • Another example: Intel’s x86 and Microsoft Windows • x86 one of the worst designed ISAs EVER, but survives • CIS 371 (Spring 2013): Computer Organization and Design. jpg "Intel Meteor Lake die photo, c/o Intel") CIS 4710/5710: Computer Organization and Design CIS 371 (Roth/Martin): Instruction Set Architectures 13 Seconds/Cycle and Cycle/Insn: Hmmm •For single-cycle datapath •Cycle/insn: 1 by definition •Seconds/cycle: proportional to “complexity of datapath” •ISA can make seconds/cycle high by requiring a complex datapath CIS 371 (Roth/Martin): Instruction Set Architectures 14 CIS 371 (Martin/Roth): Reliability 1 CIS 371 Computer Organization and Design Unit 12: Reliability Reliability of Logic and Memory •!As transistors get smaller, they are less reliable •!Wasn’t a problem a few years ago, becoming a big problem •!Transient faults CIS 371: Comp. P37X shares the following features with LC3 (and differences with MIPS): CIS 371: Comp. Taylor. Des. Milo Martin | Hardware Desciption 14 Manufacturing Steps Source: P&H CIS 371: Comp. J. CIS 371 (Roth/Martin): Pipelining 2 This Unit: (Scalar In-Order) Pipelining •! Basic Pipelining •! Pipeline control •! Data Hazards •! Software interlocks and scheduling •! Hardware interlocks and stalling •! Bypassing •! Control Hazards •! Branch prediction •! Multi-cycle operations Mem CPU I/O System software App App App CIS CIS 371 Computer Organization and Design Unit 6: Pipelining CIS371 (Roth/Martin): Pipelining 2 This Unit: (Scalar In-Order) Pipelining •Basic Pipelining •Pipeline control •Data Hazards •Software interlocks and scheduling •Hardware interlocks and stalling •Bypassing •Control Hazards •Branch prediction •Multi-cycle operations CIS 371 (Martin): Performance 1 CIS 371 Computer Organization and Design CIS 371 (Martin): Performance 2 This Unit • CPU performance equation •System software Clock vs CPI • Performance metrics • Benchmarking Mem CPU I/O App App App CIS 371 (Martin): Performance 3 Readings • P&H • Revisit Chapter 1. 4, 1. university of pennsylvania. Unit 1 - Introduction (1. Joe Devietti | Branch Prediction. CIS 371 (Roth/Martin): Instruction Set Architectures 11 Seconds/Cycle and Cycle/Insn: Hmmm •! For single-cycle datapath •! Cycle/insn: 1 by definition •! Seconds/cycle: proportional to “complexity of datapath” •! ISA can make seconds/cycle high by requiring a complex datapath CIS 371 (Roth/Martin): Instruction Set Architectures 12 CIS 371 (Spring 2011): Digital Systems Organization and Design. CIS 380 ESE 407 SSH Sen. Once you are finished, be sure create a zipfile, download your zip to your local disk and then submit your homework. Milo Martin | Caches 29 Cache Examples • 4-bit addresses → 16B memory • Simpler cache diagrams than 32-bits • 8B cache, 2B blocks • Figure out number of sets: 4 (capacity / block-size) • Figure out how address splits into offset/index/tag bits • Offset: least-significant log CIS 371 (Roth/Martin): Virtual Memory & I/O 11 CIS 371 (Roth/Martin): Virtual Memory & I/O 12 Virtualizing Processors •! How do multiple apps (and OS) share the processors? •! Goal: applications think there are an infinite # of processors •! Solution: time-share the resource •! Trigger a context switch at a regular interval (~1ms) •! repo for CIS 371 Spring 2018. Course Schedule. FET: field-effect transistor. Today’s Agenda. Note that you can open iMPACT on its own, without running ISE first, from the CIS 371 (Martin/Roth): Recap 5 Microsoft XBox Game Console History •! XBox •! First game console by Microsoft, released in 2001, $299 •! Glorified PC •!733 Mhz x86 Intel CPU, 64MB DRAM, NVIDIA GPU (graphics) •!Ran modified version of Windows OS •! CIS 371 (Martin): Vectors 1 CIS 371 Computer Organization and Design Unit 13: Exploiting Data-Level Parallelism with Vectors How to Compute This Fast? • Performing the same operations on many data items • Example: SAXPY • Instruction-level parallelism (ILP) - fine grained • Loop unrolling with static scheduling –or– dynamic A Verilog-HDL OnLine training course. Joe Devietti| Arithmetic 2 This Unit: Arithmetic •A little review •Binary + 2s complement •Ripple-carry addition (RCA) R Xilinx University Program Virtex-II Pro Development System Hardware Reference Manual UG069 (v1. Thursdays from 1:30 to 2:30pm. Milo Martin CIS 371: Comp. Think of it in two parts: what must be true for E to be true (two of the three inputs must be true), and what cannot be true (all three 25K subscribers in the UPenn community. Staci Kaplan Program Manager for DATS (Data Science MSE) Office: 308 Levine Phone: 215-573-2431 Email: stacilk@seas. Philadelphia, PA 19104-3409. Architecture and Compilers Group | Main / HomePage Download the . Venue Wu and Chen Auditorium (Room 101), Levine Hall 3330 Walnut Street Philadelphia, PA 19104 United States + Google Map View RoboPAIR, the algorithm the researchers developed, needed just days to achieve 100% “jailbreak” rate, bypassing safety guardrails in the AI governing three different robotic CIS 240 is the pre-requisite, just like for CIS 371. The description from the course catalog: (Prerequisite(s): CIS 240, knowledge of at least one programming language). CSE 371 Computer Organization and Design Last modified by: Office User Company: CIS 371 (Martin): Virtual Memory 1 CIS 371 Computer Organization and Design Unit 8: Virtual Memory Based on slides by Prof. Milo Martin | Arithmetic 13 Binary Addition: Works the Same Way 1 111111 43 = 00101011 +29 = 00011101 72 = 01001000 CIS 371 Computer Organization and Design Part III: Memory Hierarchy Unit 9: Caches CIS371 (Roth/Martin): Caches 2 Recall: Binary Tree Performance vs Size CIS371 (Roth/Martin): Caches 3 Recall: Binary Tree Performance vs Size 5x5x difference 1M What is going on here? CIS371 (Roth/Martin): Caches 4 Average Instructions per Lookup CIS 371: Comp. Note that you can open iMPACT on its own, without running ISE first, from the Spring 2014: CIS 371, Head TA dmally@seas. edu Program Director. Note that you can open iMPACT on its own, without running ISE first, from the ![Xilinx XC2064 die photo, c/o Xilinx](images/xc2064-die-photo. Tutorials. Milo Martin CIS 371 (Martin): Single-Cycle Datapath 2 This Unit: Single-Cycle Datapath • Datapath storage elements • MIPS Datapath Mem CPU I/O • MIPS Control System software CIS 371 (Spring 2009): Digital Systems Organization and Design. asm file using turnin on eniac. Milo Martin: Design Document Due: Wednesday, April 13th (turn in PDF via Blackboard by 7pm) Preliminary Demo Due: Thursday, April 21st (you must demo it repo for CIS 371 Spring 2018. A closer look at system level software. Direct Mapped Caches I [3 points] 2 load 1101010111010110 — Cache — Data Index Tag 00 01 10 11 State. efouh [at] cis. Milo Martin | Data-Level Parallelism 11 GPUs and SIMD/Vector Data Parallelism • How do GPUs have such high peak FLOPS & FLOPS/Joule? CIS 501: Comp. Office Hours: Monday and Wednesday: 4:30pm - 5:15pm, + 30 Assignments | Policies: CIS 4550/5550: Policies. In this course you will design and implement a pipelined, superscalar CIS 371 (Spring 2013): Computer Organization and Design. CIS 371: Comp. This web page is no longer maintained, Spring 2013 - CIS 371: Digital Systems Organization and Design; Fall 2012 - CIS 501: Computer Architecture; CIS 371 (Martin/Roth): Reliability 1 CIS 371 Computer Organization and Design Unit 12: Reliability Reliability of Logic and Memory •!As transistors get smaller, they are less reliable •!Wasn’t a problem a few years ago, becoming a big problem •!Transient faults CIS 371 (Spring 2012): Digital Systems Organization and Design. • Motivational experiments. Milo Martin | Hardware Desciption 15 Manufacturing Steps • Multi-step photo-/electro-chemical process • More steps, higher unit cost + Fixed cost mass production ($1 million+ for “mask set”) CIS 371 (Martin/Roth): Multicore 1 CIS 371 Computer Organization and Design Unit 9: Multicore (Shared Memory Multiprocessors) Mem CIS 371 (Martin/Roth): Multicore 2 This Unit: Shared Memory Multiprocessors •! Thread-level parallelism (TLP) •! Shared memory model •! Multiplexed uniprocessor •! Hardware multihreading •! Multiprocessing Email: milom@cis. Milo Martin Memory Module for Processor CIS 371 (Martin): Lab Hints 2 PC Memory 216 by 16 bit 16 16 16 16 3’b111 insn[11:9] 3 Branch Unit 16 16 LC4 Non-Pipelined Datapath - Spring 2011 Reg. Time: Tuesdays and Thursdays 10:15-11:45 Location: MacNeil 286-7 CIS 371 (Martin/Roth): Power 1 CIS 371 Computer Organization and Design Unit 13: (Low) Power and Energy CIS 371 (Martin/Roth): Power 2 Power/Energy Are Increasingly Important •!Battery life for mobile devices •!Laptops, phones, cameras •!Tolerable temperature for CIS 371 (Spring 2013): Computer Organization and Design. com UG069 (v1. Announcements [May 6] - 2011 final solutions [May 4] - Homework 2 CIS 371 (Roth/Martin): Performance 1 CIS 371 Computer Organization and Design Unit 3: Performance CIS 371 (Roth/Martin): Performance 2 This Unit •Performance •Latency and throughput •Benchmarking MemCPUI/O •CPU performance equation System software AppAppApp CIS 371 (Roth/Martin): Performance 3 Readings •P+H •Chapter 4 CIS 371 (Roth CIS 371 (Martin): Digital Logic & Hardware Description 1 CIS 371 Computer Organization and Design Unit 2: Digital Logic & Hardware Description Based on slides by Prof. edu Instructor: Prof. xilinx. Milo Martin | Arithmetic 2 This Unit: Arithmetic • A little review • Binary + 2s complement • Ripple-carry addition (RCA) CIS 371 (Martin): Multicore 1 CIS 371 Computer Organization and Design Unit 12: Multicore (Shared Memory Multiprocessors) Slides originally developed by Amir Roth with contributions by Milo Martin at University of Pennsylvania with sources that included University of Wisconsin slides by Mark Hill, Guri Sohi, Jim Smith, and David Wood. Britton Carnevali Doctoral Program Manager CIS 371 (Spring 2011): Computer Organization and Design. Time: Tuesdays and Thursdays 10:15-11:45 Location: MacNeil 286-7 Attendance at lectures is a course requirement. Collaboration: You are encouraged to discuss your homework assignments with your classmates; however, 1) any code you submit must be your own work, and 2) you may not show your code to a classmate or look at a classmate's code. Amir Roth, Milo Martin & C. Milo Martin | Data-Level Parallelism 11 GPUs and SIMD/Vector Data Parallelism • How do GPUs have such high peak FLOPS & FLOPS/Joule? ![Intel Meteor Lake die photo, c/o Intel](images/intel-meteor-lake. Angineh Keshishian (angkesh # @ # seas) . MATH 3710 (371) or MATH 5030 (503) Algorithms (1 CU) CIS 3200 (320) Logic (2 CU) LGIC 3100 (310) (also offered as MATH 5700 (570) and PHIL 4721 (410)) weinstein@cis. The following analogy is roughly true: P37X is to MIPS as LC3 is to X86. Unit 7: Branch Prediction. It covers the full language, including UDPs and PLI. CIS 371 (Martin): Scheduling 2 This Unit: Static & CIS 371 (Martin/Roth): Multicore 1 CIS 371 Computer Organization and Design Unit 9: Multicore (Shared Memory Multiprocessors) Mem CIS 371 (Martin/Roth): Multicore 2 This Unit: Shared Memory Multiprocessors •! Thread-level parallelism (TLP) •! Shared memory model •! Multiplexed uniprocessor •! Hardware multihreading •! Multiprocessing CIS 371 (Spring 2012): Digital Systems Organization and Design Lab . CIS 371 (Martin): Scheduling 1 CIS 371 Computer Organization and Design Unit 11: Static and Dynamic Scheduling Slides originally developed by Drew Hilton, Amir Roth and Milo Martin at University of Pennsylvania CIS 371 (Martin): Scheduling 2 This Unit: Static & Dynamic Scheduling • Code scheduling • To reduce pipeline stalls CIS 371 has been renumbered to CIS 471/571. This course is for undergraduate and graduate students with prior knowledge CIS 371: Comp. I jumped straight into MATH 370/371 without that course but with 160/121 under my belt. Jessica Kwasniak 411 Cohen Hall (215) 898-7423 jkwas@sas. Think of it in two parts: what must be true for E to be true (two of the three inputs must be true), and what cannot be true (all three CIS 371 (Spring 2013): Computer Organization and Design. Lecturer Shehzan Mohammed mza@seas. Functional simulation is used to make sure that the logic of a design is CIS 371: Comp. ![RISC-V Urania Chip from ETH Zurich and the University of Bologna](images/riscv-pulp-urania. , output) on the left • add $1, $2, $3 means $1 $2+$3 • Other ISAs CIS 371 (Spring 2013): Computer Organization and Design. cis-info@cis. Taylor and Benedict Brownat the University of Pennsylvania with sources that included University of Wisconsin slidesby Mark Hill, GuriSohi, Jim Smith, and David Wood. CIS 371 (Spring 2013): Computer Organization and Design. Topics. It also introduces some of the basic contructs of Verilog models. CIS 371 has been renumbered to CIS 471/571. Throughput • Latency (execution time): time to finish a fixed task • Throughput (bandwidth): number of tasks in fixed time • Different: exploit parallelism for throughput, not latency (e. Slides developed by M. Preferably received an A Strong C or C++ Also useful: CIS 371 or CIS 501 I don’t check prereqs CIS 550 Databases & Information System Course Description This course provides an introduction to the broad field of information management systems, covering a range of topics relating to structured data, from data modeling to logical foundations and popular languages, to system Read more CIS 371 (Spring 2013): Computer Organization and Design. CIS 5520, Fall 2024: Time: MW 12:00 - 1:30 PM: Location: 3401 Walnut, 401B: Prerequisite: Four courses involving significant programming and a discrete mathematics or modern algebra course: People: Instructor: Stephanie Weirich, Levine 510: Teaching assistants: Jonathan Chan, Mayank Keoliya, Gary Chen: Stephanie's office hours: Wednesdays, 2 The course requires undergraduate-level operating systems and networking knowledge, such as CIS 3800 and NETS 2120 (or the equivalence). upenn. edu: turnin -c cis371 -p hw1 div. (Prerequisite(s): CIS 240, knowledge of at least one programming language). Login Log in with your Google@SEAS account CIS 371 (Martin): Virtual Memory 24 Multi-Level Page Table (PT) • One way: multi-level page tables • Tree of page tables (“trie”) • Lowest-level tables hold PTEs • Upper-level tables hold pointers to lower-level tables • Different parts of VPN used to index different levels 25K subscribers in the UPenn community. The assignment due dates are also approximate, and may be adjusted to be a class period earlier or later depending on if we're ahead or behind with the course material. CIS 371 (Spring 2009): Digital Systems Organization and Design Tentative Course Schedule. , bread) CIS 371 (Martin): Lab Hints 1 CIS 371 Computer Organization and Design Unit 10: Lab Hints Based on slides by Prof. Your final grade will consist of: 20% - Midterm 1; 20% - Midterm 2; 30% - Final Exam; 25% - Homework CIS 371 (Spring 2013): Computer Organization and Design. Date: CIS 371 (Roth/Martin): Caches 17 CIS 371 (Roth/Martin): Caches 18 Evolution of Cache Hierarchies Intel 486 8KB I/D$ 1. CIS 565 Hall of Fame Are you next? Krishnan Ramachandran Jon McCaffrey Varun Sampath Sean Lilley Ian Lilley Tiju Thomas Zakiuddin Shehzan Mohammed Gundeep Singh Seunghoon Park Prerequisites Passion for computer graphics CIS 460/560. Joseph Devietti| Superscalar 1 CIS 371 Computer Organization and Design Unit 9: Superscalar Pipelines Slides developed by M. It is a simple RISC ISA that resembles a combination of MIPS and LC3. File wdata 3’b111 insn[11:9] email: cis341@seas. 4 1 Curriculum Deferred Student 0. Announcements. ESE 370: Circuit-Level Modeling, Design, and Optimization for Digital Systems. XUPV2P User Guide: the datasheet for the Virtex-II Pro boards we are using. before outcome is known. The simplest dynamic branch direction predictor is an array of 2 n two-bit saturating counters. asm [11 points] Effectiveness of Compiler Optimizations. Milo Martin: Demo Due: Thursday, February 24 (you must demo it in the KLab by 7pm) Writeup Due: Friday, February 25 (turn in PDF via Blackboard) Instructions: Download the . Milo Martin CIS 371 (Martin): Arithmetic 2 This Unit: Arithmetic • A little review • Binary + 2s complement • Ripple-carry addition (RCA) • CIS 371 Computer Organization and Design Part III: Memory Hierarchy Unit 9: Caches CIS371 (Roth/Martin): Caches 2 Recall: Binary Tree Performance vs Size CIS371 (Roth/Martin): Caches 3 Recall: Binary Tree Performance vs Size 5x5x difference 1M What is going on here? CIS371 (Roth/Martin): Caches 4 Average Instructions per Lookup CIS 371 (Martin): Scheduling 1 CIS 371 Computer Organization and Design Unit 11: Static and Dynamic Scheduling Slides originally developed by Drew Hilton, Amir Roth and Milo Martin at University of Pennsylvania . CIS 350 CIS 371 SSH Conc. edu View Organizer Website. Amir Roth & Prof. MK Office Hours: Right after class on Thursdays or by appointment. com . Topics: Lexing/Parsing; Code generation; Semantic analysis; Optimization; Run-time support; Reading and References. Milo Martin | Multicore 11 Multicore: Mainstream Multiprocessors • Multicore chips • IBM Power5 • Two 2+GHz PowerPC cores • Shared 1. , output) on the left • add $1, $2, $3 means $1 $2+$3 • Other ISAs CIS 371: Comp. free SSH Sen. Update I am now employed by Google, and I am no longer a professor at Penn. Here’s the equation for D: D = A + B + C F is equally simple: F = A · B · C E is a little tricky. This course is the lecture component of CIS372. The compiler's goal is to generate the fastest code for the given input program. Contribute to upenn-acg/cis371 development by creating an account on GitHub. 0) March 8, 2005 PC Memory 216 by 16 bit 16 16 16 3’b111 insn[11:9] 3 Branch Logic 16 16 LC4 Non-Pipelined Datapath - Spring 2012 Reg. Basic technology element: MOSFET Solid-state component acts like electrical switch. year. Those two classes gave me more than enough experience with CIS 371 Computer Organization and Design Unit 2: Single-Cycle Datapath and Control CIS371 (Roth/Martin): Datapath and Control 2 This Unit: Single-Cycle Datapaths •! Digital logic basics •! Focus on useful components •! Mapping an ISA to a datapath •! MIPS example •! Single-cycle control Mem CPU I/O System software App App App Download the . Joseph Devietti | Superscalar. A closer look at hardware layers. 5 3 Senior Spring Tech. school of engineering and applied science. Approximately how many good (defect-free) PENN CIS 6250, FALL 2024: THEORY OF MACHINE LEARNING Prof. Set switch 1 to PROM (up) to indicate that the design should come from the PROM, not from the download cable (JTAG). Milo Martin CIS 371 (Martin): Digital Logic & Hardware Description 2 This Unit: Digital Logic & Hdw Description • Transistors & frabrication CIS 371: Comp. • What is computer organization anyway? • and the forces that drive it. 0 0 questions 3 3 students. Read more at the CIS 471 homepage. CIS 371 (Roth/Martin): Pipelining 2 This Unit: (Scalar In-Order) Pipelining •! Basic Pipelining •! Pipeline control •! Data Hazards •! Software interlocks and scheduling •! Hardware interlocks and stalling •! Bypassing •! Control Hazards •! Branch prediction •! Multi-cycle operations Mem CPU I/O System software App App App CIS CIS 371 (Spring 2013): Computer Organization and Design. 2. Intuitively, this equation shows that if either the area of the chip or the defect rate increases, the yield decreases. Milo Martin: Lecture: Tuesday/Thursday 12-1:20pm: E-mail: cis371@cis: TAs: Christian DeLozier, Abhishek Udupa: Lab TAs: (Prerequisite(s): CIS 240, knowledge of at least one programming language). CIS 371 (Spring 2012): Digital Systems Organization and Design Lab . Milo Martin | Data-Level Parallelism 10 Graphics Processing Units (GPU) Tesla S870! • Killer app for parallelism: graphics (3D games) CIS 371: Comp. CIS 6010, Fall 2022, Fall 2023 CIS 4710/5710, Spring 2023 CIS 471/571, Spring 2021, Spring 2022 CIS 700-002, Fall 2021 CIS 371, Spring 2018, Spring 2020 CIS 501, Spring 2019, Fall 2019 CIS 501: Computer Architecture, Fall 2013, Spring 2015, Fall 2015, Fall 2016, Fall 2017 CIS 601: GPGPU Where A is the area of the chip in mm 2, D is the defects per mm 2, and yield is a number between 0 and 1. CIS 371 (Roth/Martin): Vectors 1 CIS 371 Computer Organization and Design Unit 14: Exploiting Data-Level Parallelism with Vectors Best Way to Compute This Fast? •!Sometimes you want to perform the same operations on many data items •!Surprise example: SAXPY •!One approach: superscalar (instruction-level parallelism) `timescale 1ns / 1ps module lc4_regfile(clk, gwe, rst, r1sel, r1data, r2sel, r2data, wsel, wdata, we); parameter n = 16; input clk, gwe, rst; input [2:0] r1sel, r2sel Your CIS Contacts: Redian Furxhiu Program Manager for on-campus Graduate MCIT, CIS/MSE and CGGT programs Office: 308 Levine Phone: 215-898-1668 Email: redian@seas. Milo Martin | Superscalar 1 CIS 371 Computer Organization and Design Unit 9: Superscalar Pipelines Slides developed by Milo Martin & Amir Roth at the University of Pennsylvania with sources that included University of Wisconsin slides by Mark Hill, Guri Sohi, Jim Smith, and David Wood CIS 371 (Spring 2013): Computer Organization and Design. Milo Martin | Performance 7 Performance: Latency vs. Xilinx ISE tutorial; Xilinx ISE tips; Xilinx BIST (built-in self test) tutorial; Xilinx PROM (programmable ROM) tutorial; ModelSim tutorial; ModelSim tips; Board Documentation. Functional simulation is used to make sure that the logic of a design is repo for CIS 371 Spring 2018. edu 3440 Market Street, Suite 100 Philadelphia, PA 19104-3335 (215) 898-7326 summer@sas. Based on slides by Profs. The files for this homework are already available in the Codio project, but you can How to Take This Course CHAPTER 1 - Introduction, Hierarchy, and Modelling Structures This section provides background about the history of Verilog. MOS: metal-oxide-semiconductor. Milo Martin CIS 371 (Martin): Arithmetic 2 This Unit: Arithmetic • A little review • Binary + 2s complement • Ripple-carry addition (RCA) • Fast integer addition • Carry-select (CSeA) CIS 371: Comp. 8 GB/s FSB bandwidth link each way CIS 557 - Programming for the Web. Milo Martin: Instructions: This is a group lab. edu Prerequisites: CIS 121 and CIS 240. Taylor and Benedict Brown at the University of Pennsylvania with sources that included University of Wisconsin slides by Mark Hill, GuriSohi, Jim Smith, and David Wood. Summaries. You must also be proficient in C or C++ programming. Mainak Datta, BSE in Computer Science, MSE in Computer Science CIS 240 Spring 2014: CIS 371, Head TA dmally@seas. CIS 501Computer Organization and Design. Here's the tentative list of topics: Go to UPenn r/UPenn. 3330 walnut street | levine hall | philadelphia, pa 19104-6309 | 215-898-8560 CIS 371 Computer Organization and Design Unit 3: Arithmetic Based on slides by Profs. 8 GB/s FSB bandwidth link each way penn engineering©2017. edu CIS 371 has been renumbered to CIS 471/571. Unit 0 - Introduction (2 lectures) Unit 1 - Instruction In a new paper, to be shared at NeurIPS 2024 as a spotlight, Yatskar, together with Chris Callison-Burch, Professor in CIS, and first author Yue Yang, a doctoral student advised CIS 471/571 was called CIS 371/501 in previous semesters. Martin: From 4:30 to 5pm on any day I lecture for CIS371 (basically, the 30 minutes or so after class). Weather permitting, I'll hold OHs in the outdoor seating area near MacNeil, otherwise in one of my offices. You may find using log(S), log(B), and log(A) in the formulas easier than S, B, and A directly. 9 The ISA will will implement in CSE 371/372 is called P37X. I jumped straight into MATH 370/371 without that course but with 160/121 under my belt mkearns@cis. Connects source drain only when A copy of the PennSim simulator for CIS 240. Arch. File 3’b111 insn[11:9] 3 CIS 5710: Comp. Approximately how many good (defect-free) Xilinx Virtex-II PROM Tutorial CSE 372 (Spring 2007): Digital Systems Organization and Design Lab. Prof. Is it better to take CIS 471 (frmly 371) before 380 or vice versa? Or does it not matter? CIS 371 (Spring 2009): Digital Systems Organization and Design. 0101110101 1101 BD FE AB DE D Xilinx Virtex-II PROM Tutorial CSE 372 (Spring 2007): Digital Systems Organization and Design Lab. r/UPenn. Tentative Course Schedule. Milo Martin | Lab Hints 22 Testing The Entire Processor • Need a little bit more to test the entire processor • First thing you need is a program to test • Open file include/bram. Milo Martin | Data-Level Parallelism 11 GPUs and SIMD/Vector Data Parallelism • How do GPUs have such high peak FLOPS & FLOPS/Joule? CIS 371 (Spring 2012): Digital Systems Organization and Design. How to Take This Course CHAPTER 1 - Introduction, Hierarchy, and Modelling Structures This section provides background about the history of Verilog. CIS 371 (Spring 2012): Digital Systems Organization and Design. The following books contain useful course material, and much of the lecture content is derived from them (and other sources). This is an interactive, self-directed introduction to the Verilog language complete with examples and exercises. Org. Component SW9, located on the right side of the FPGA board, is used to load a design from the PROM into the FPGA. jpg "Intel Meteor Lake die photo, c/o Intel") CIS 4710/5710: Computer Organization and Design CIS 371: Comp. Each counter includes one of four values: strongly taken (T), weakly taken (t), weakly not taken (n), and strongly not taken (N). Milo Martin | Pipelining 23 Instruction Convention • Different ISAs use inconsistent register orders • Some ISAs (for example MIPS) • Instruction destination (i. College of Arts & Sciences; Graduate Division; Fall 2014: CIS 240 aaquino@seas. 5450: Penn CIS also offers CIS 5450, which offers a holistic view of the data science pipeline, including data wrangling, data visualization, machine learning, and scalable data Levine Hall 572 3330 Walnut Street. ![Intel Meteor Lake die photo, c/o Intel](images/intel-meteor-lake. edu Undergraduate Coordinator. Course Description. The only files you need to modify are dna. . Using the PROM. This schedule is tentative. : Instructions: To get started: Visit the CIS 1200 course in Codio and select the “hw02: Computing Human Evolution” project. Milo Martin | Scheduling 1 CIS 371 Computer Organization and Design Unit 10: Static & Dynamic Scheduling Slides developed by Milo Martin & Amir Roth at the University of Pennsylvania with sources that included University of Wisconsin slides by Mark Hill, Guri Sohi, Jim Smith, and David Wood CIS 371 (Martin): Lab Hints 1 CIS 371 Computer Organization and Design Unit 10: Lab Hints Based on slides by Prof. seas. CIS 6010, Fall 2022, Fall 2023, Fall 2024 CIS 4710/5710, Spring 2023, Spring 2024 CIS 471/571, Spring 2021, Spring 2022 CIS 700-002, Fall 2021 CIS 371, Spring 2018, Spring 2020 CIS 501, Spring 2019, Fall 2019 CIS 501: Computer Architecture, Fall 2013, Spring 2015, Fall 2015, Fall 2016, Fall 2017 Levine Hall 572 3330 Walnut Street. Here are answers to some common questions about this offering of CIS 501. edu : Curriculum Vitae. It makes little sense to take both courses (though taking CIS 4190/5190 and later CIS 5200 is possible). jpg "RISC-V Urania Chip from ETH Zurich and the University of Bologna") A Verilog-HDL OnLine training course. The subreddit for the University of Pennsylvania, located in Philadelphia, PA. Beyond CIS 371/501. Design Document (Part A) Due: Thursday, April 4th (turn in PDF via Canvas by 6pm) Preliminary Demo (Part B1 & Part C1) Due: Thursday, April 11th (you must demo it in the KLab by 6pm) Fall 2014: CIS 240 aaquino@seas. CIS 501: Comp Arch| Dr. Assuming 32-bit address, write formulas in terms of S, B, and A for calculating the following quantities. hex file representation that can be loaded into a Verilog memory. Milo Martin: Demo Due: Thursday, January 31st: Writeup Due: Friday, Feb 1st: Instructions: This lab should be done in groups of two or three. CIS 5530: Networked Systems Fall 2023 Instructor: Vincent Liu Lecture location: STIT 261 Time: MW 3:30 – 5:00 pm ET External Sites: Ed Discussion, Canvas, and Gradescope Office hours: Wed 2:00 – 3:00 pm ET @ Levine 574 or by appointment TAs (show Content Project):. Piazza Message Boards. CIS 5710Computer Organization and Design. Instructions. elec. edu Prerequisites. Please let me know in advance if Website for CIS 565 GPU Programming and Architecture Fall 2021 at the University of Pennsylvania CIS 371: Digital Systems Organization and Design Class forum; LinkedIn Group: for networking with current and previous course students. Two kinds of simulation are used for testing a design: functional simulation and timing simulation. Diving into gate-level abstractions. The subreddit for the University of cis 140, cis 120, cis 110, cis 350, cis 450, cis I never took that class but I've heard good things. Follow this course Chat. department of computer and information science. ml. hex"! CIS 371: Comp. Louis Petro, BAS in Computer and Cognitive Science, BA Cognitive Science, Minors in Nutrition and Mathematics Semesters as a TA: Fall 2013 – Spring 2015: CIS 110 CIS 371 (Spring 2013): Computer Organization and Design. Includes pin mappings. Milo Martin: Tuesday/Thursday 12-1:20pm: E-mail: cis371@cis: TAs: Jim Anderson, Cem Karan: Lab TAs: Zach Meister, Vin Mannino, Mishal Awadah: Course Schedule. bit file, turn your board on and make sure the download configuration switches are set correctly, and use iMPACT to program your FPGA with the self test. Sat 11:00 am – 12:00 pm ET @ OHQ Project Sun 9:00 – . ModelSim is an application that integrates with Xilinx ISE to provide simulation and testing tools. duldh gdlatlzt wkreif ecafc nkgm tkui jnsxh jfhvcybv bxtb vqatoxs